Rajesh designs photonic integrated circuits for communications and sensing. He is as comfortable in a foundry review as in a grant panel, which is rarer than it should be.
He likes problems where the physics is settled and the packaging is not.
This is not modesty but a considered position. In his experience the great majority of photonics programmes that fail do so at fibre attachment, thermal management or hermetic sealing — steps which attract no papers, little funding and none of the glamour, and which nevertheless determine whether a device can be sold.
His group works across silicon and III-V platforms and maintains deliberately close relationships with foundries, on the grounds that a design which cannot be fabricated at a sensible yield is a drawing. He is generous with students and unsentimental about designs, including his own.
Selected projects
Named work, with a sentence of context each.
Compact optical inter-satellite terminal
Optical design and thermal analysis for a terminal small enough for a 6U platform, including the pointing-stability budget that dictated the structural design rather than following it.
Foundry process development lot
Ran a shared process lot for three industrial partners, which reduced each party's development cost and produced yield data none of them would have obtained alone.
In-line optical process monitor
Adapted a laboratory interferometric technique into a factory-tolerant instrument, then spent most of the project on vibration and contamination rather than optics.
Working with Nair
He asks for the mass, power and thermal budget at the first meeting, and for the name of whoever owns them. Photonics projects are usually constrained by those three numbers long before they are constrained by optical performance.
Where a project intends to reach a product, he will insist that packaging and test are scoped in the same work package as the design. He has watched too many programmes deliver a working die and stop.
Looking for
Payload and factory partners who understand that photons still need a home.
Probably not for
Projects that have budgeted for a chip and not for its packaging.
Credits and contributions
- Design authority on four photonic integrated circuit tape-outs with industrial partners
- Member of a national photonics roadmap advisory group
- Co-founder of a spin-out later acquired by an optical components manufacturer